Space Analysis Engineer Associate Or Mid Level Electronics Packaging Mechanical Product Design Jobs

Space Electronics Packaging and Mechanical Product Design and Analysis Engineer (Associate or Mid-level) Company: The Boeing Company Boeing

and Mechanical Product Design and Analysis Engineer (Level 2) to join us as part of our Electronics Packaging and Mechanical Product Design Team located

for Associate Mechanical Product Design and Analysis Engineers (Level 2) to join our Space Electronics Packaging team in El Segundo, California.

…hiring a Subject Matter Expert Level Space Electronics Packaging and Mechanical Product Design and Analysis

looking for an Entry-Level Mechanical Product Design and Analysis Engineer (Level 1) to join our Space Electronics Packaging team in El Segundo, California

) is hiring for an Associate or Mid-Level Electronic Design & Analysis Engineer (Level 2 or 3) in El Segundo, CA.

…looking for a Manager - Mechanical Product Design (Digital and Power Electronics Engineering) (Level K) to join our team in El Segundo, California

…looking for a Manager - Mechanical Product Design Engineering (RF Space Electronics) (Level K) to join our team in El Segundo, California.

Summary pay range for Associate (Level 2): $98,600.00 - $133,400.00 Summary pay range for Mid-Level (Level 3): $119,850.00 - $162,150.00

We are seeking a proactive, mid‑level Product Engineer who will take full ownership of hardware development with minimal supervision.

on mechanical design questions Mentor senior and mid-level engineers through design reviews, hands-on guidance, and day-to-day collaboration

· Mentor engineers, lead design reviews, and build team capability in electro-optical packaging.

· Mentor engineers, lead design reviews, and build team capability in electro-optical packaging.

, industry working groups, and/or associations such as NASA Electronics Parts Assurance Group, Defense Logistics Agency, Joint Electron Device Engineering Council

engineers to provide DFM and DFA feedback on assembly accessibility, connector placement, thermal interface design, and testability Define and execute