Remote Asic Physical Design Engineer Synthesis Timing Associate Or Experienced Jobs

Hands-on experience with synthesis, static timing analysis and timing constraints.

As a Principal Modem SOC Design Engineer on the ASIC Engineering SOC Team, you will be a technical design leader for the TeraWave satellite communication

…clock and reset architecture Support synthesis, timing constraint development, and timing closure with physical design teams

…push the boundaries in quantum physics

Collaborative - experienced working across IT, engineering, quality, compliance, and external implementation partners.

Collaborative - experienced working across IT, security, and engineering teams.

Regular, full-time employees are eligible to receive the following benefits: Paid vacation time, sick leave, holiday pay and 401K savings plan.

Working with LeoLabs' experienced RF engineers and Hardware Engineering team to obtain antenna characteristics, emission parameters, radiation patterns