Senior Asic Rtl Design Engineer Ai Hardware Jobs in San Francisco, CA

…if you: Have expertise in ASIC or FPGA design: RTL, design verification (UVM, formal methods, coverage-driven),

…reason through complex problems and hardware designed for the demands of advanced AI.

…reason through complex problems and hardware designed for the demands of advanced AI.

Responsibilities Design and implement drivers for hardware peripherals, including those related to AI chips.

Senior FPGA Engineer As a Senior FPGA Engineer you'll be responsible for the architecture, the design, the verification, and

The ASIC Verification Engineer leads verification of complex digital subsystems for next-generation Satellite communication ASICs.

This is a senior engineering role with broad technical ownership and substantial direct RTL work.

Senior Electrical Engineer - SDR Hardware Design As a software defined radio Hardware Engineer at Astranis

…this role, you will lead engineering development to expand and refine capabilities within our automated design engine product, where we leverage AI to automate

We’re looking for experienced Design Verification (DV) Engineers to ensure functional correctness and robust design for our cutting-edge ML accelerators.

Build credibility with senior technical and business leaders while communicating equally well with hands-on engineers.

…role We are seeking a Senior Hardware Reliability Engineer to own vehicle-level reliability testing and hardware issue

Build credibility with senior technical and business leaders while communicating equally well with hands-on engineers.

Help shape how hardware engineering operates at Anthropic — develop and apply AI-assisted approaches to design, spec review, and validation; establish

It requires deep integration across hardware, software, AI, operations, manufacturing, and real estate. We don’t just build machines in a lab.