Silimate Automates Chip Design Workflows with AI-Native Copilots

Silimate is building an AI copilot for chip designers aimed at accelerating design cycles and enabling autonomous spec-to-design workflows. Traditional electronic design automation (EDA) workflows can take 12 to 18 months, forcing engineering teams through slow simulation and verification cycles. Silimate's platform helps teams generate power-, performance-, and area-optimized (PPA) Register-Transfer Level (RTL) code while automating root-cause analysis for hardware bugs.

Founded in 2023 by Stanford University alumni Ann Wu (CEO) and Akash Levy (CTO), the Mountain View, California-based startup emerged from Y Combinator's S23 batch. Silimate is backed by Y Combinator, Soma Capital, Pioneer Fund, Unpopular Ventures, and Life Extension Ventures. Operating with eight employees, the Seed-stage startup is actively hiring across engineering and research roles to build its core technology.

Stanford Roots and EDA Innovation

Silimate grew out of the founders' graduate research and industry experience. Ann Wu holds a master's degree from Stanford and previously designed custom silicon at Apple, managed inference ASIC programs at Meta, and led product strategy at an AI chip startup. Akash Levy earned a Ph.D. in Electrical Engineering from Stanford, where he taped out three chips, authored 14 papers on circuit design, and worked on EDA tools at Synopsys, NVIDIA, and AWS.

Speaking at a Stanford event reported by The Stanford Daily, Wu demonstrated how Silimate's copilot operates within VS Code via a command-line interface. In a live test on a processor design with a known bug, the system traced the failure's root cause, generated a patch, and summarized the debugging process.

In a presentation featured in the video 63 DAC Exhibitor Forum | Ann Wu, Silimate, Inc., Levy detailed Silimate's architecture, including its fast PPA estimation engine Precursor, its debugger tool SMDB, and always-on agents that monitor top-of-tree repositories for PPA drift and testbench failures. Levy noted that Precursor delivers 40x to 1,000x speedups compared to traditional synthesis tools while staying within 15% accuracy of ground truth. He added that Silimate is in production with over 20 global teams and has run through more than 50 IP blocks.

Levy also shared the startup's backstory in the video Podcast with Akash Levy | Building Silimate and the Future of AI in Chip Design (YC Startup Journey), recounting how he and Wu validated market demand through Stanford's Startup Garage before joining Y Combinator. Additionally, Levy discussed the fundamentals of static timing analysis in the video Overview of Static Timing Analysis in OpenSTA - Akash Levy, highlighting Silimate's open-source contributions to OpenSTA, including JSON reporting extensions and RTL source attribution.

Expanding Engineering and Research Teams

To expand its platform, Silimate is recruiting engineers and interns for in-person positions in Mountain View and San Francisco.

The company is hiring a Chip/Software Engineer ($140,000 - $220,000 / year) to write Python and C++ code for enterprise customers, make software architecture decisions, and design ASICs using SystemVerilog and front-end EDA tools. For machine learning development, the team is hiring an Applied AI Engineer ($140,000 - $220,000 / year) to build AI models and infrastructure in Python, C++, and PyTorch while fine-tuning and benchmarking LLMs and foundation models.

Silimate is also offering three internship roles paying $5,200 to $7,000 per month:

• An AI Research Intern to architect, implement, and benchmark methodology across models and training frontiers for AI-native chip design alongside the founders.
• A Chip/EDA/Software Intern with VLSI experience to build EDA software in Python and C++ and act as a liaison with tooling partners.
• An Applied AI Intern to develop AI tooling and agents in Python and C++ in direct collaboration with the founders.

Open Roles at Silimate

See all open roles at Silimate