RTL design engineer – AI Networking

RTL design engineer – AI Networking at Velaura AI. Location: India. Seniority: Mid. Experience: 12+ years. Skills: I2C, UVM, Physical Design, PCIe, Static Timing Analysis, Scripting, Register Transfer Level, Artificial Intelligence, ASIC, Integrated Circuit Design, Modeling, Logic Design, Computer Architecture, GPU, Networking Technologies.