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IC Layout Design Engineer

Compensation
$105,000–$205,000/year

Job Description

IC Layout Design Engineer at Velaura AI. Location: Santa Clara, California. Salary: USD 105,000-205,000/year. Seniority: Mid. Experience: 10+ years. Skills: TCL, Physics, CMOS, Aging, Mixed Signal, Monte Carlo Simulation, Stress Analysis, Electronic circuit simulation, Scripting, Feasibility Studies, Integrated Circuit Design, Modeling, Digital Circuits, Verilog, EDA.

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Job Details

Category
Mechanical
Employment Type
Full Time
Location
Santa Clara, California
Posted
Oct 4, 2024, 05:12 PM
Listed
Apr 4, 2026, 05:24 PM
Last updated
Apr 4, 2026, 10:50 PM
Compensation
$105,000 - $205,000 per year

About Velaura AI

Part of the growing space & AI ecosystem pushing the frontiers of technology.

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IC Layout Design Engineer
Velaura AI
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