Engineer, ASIC Design

Engineer, ASIC Design at Kinara. Location: Santa Clara, California. Salary: USD 95,000-205,000/year. Seniority: Mid. Experience: 5+ years. Skills: SystemVerilog, Integrated Circuit Design, Verilog, Static Timing Analysis, VHDL, Tool Design, ASIC, Python, Register Transfer Level, Scripting, User Interface Design, TCL, Algorithms, Automation, Logic Design.