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Partcl

Seed raised
Design a chip in minutes

Design a chip in minutes

YC P25

About the Company

Partcl is developing the next generation of chip design automation tools.

Using GPUs and AI, we are developing design tools that are 1000x faster than legacy options. That’s the difference between waiting weeks vs. minutes for design feedback.

Talk to us if you want to build the foundation of artificial intelligence.

Founders

Vamshi Balanaga
Vamshi Balanaga

CTO at Partcl. Previously built embedded ML models at Apple, laser weeding robots at Carbon Robotics, and warehouse automation robots at Fulfil Solutions. Built and launched multiple rockets while running the avionics team at Space Enterprise at Berkeley, Stanford EECS PhD (dropout), UC Berkeley Physics.

William Salcedo
William Salcedo

CEO at Partcl. Previously at Nvidia, Stanford, and Cornell. I taped-out two chips from scratch as an undergrad and developed one of the earliest chips designed by LLMs. My research at Stanford included using AI techniques to verify circuits.

Ready to start your space career at Partcl?

Shipping like we're funded. We're not. No affiliation.

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